The present invention relates to signal processing circuits, and more particularly, this invention relates to calibration of anti-aliasing filters in signal processing circuits.
In systems that process analog signals in part in the digital domain, it is often desirable to limit the frequency components of the input signal before sampling by an analog to digital convertor (ADC) to some fraction of the sample frequency, e.g., less than ½ the sample frequency. Any input frequency components to the ADC above the fraction of the sample rate (e.g., above ½ the sample rate) are reflected below the fraction of the sample rate (e.g., below ½ the sample rate) after recovering the analog signal using a digital to analog converter (DAC) positioned downstream of the ADC output. For this reason, it is important to control the cutoff frequency of the low pass Anti-Aliasing (AA) filter in the analog domain. At the same time, it is desirable to have a simple analog AA filter design.
In magnetic storage systems, magnetic transducers read data from and write data onto magnetic recording media. Data is written on the magnetic recording media by moving a magnetic recording transducer to a position over the media where the data is to be stored. The magnetic recording transducer then generates a magnetic field, which encodes the data into the magnetic media. Data is read from the media by similarly positioning the magnetic read transducer and then sensing the magnetic field of the magnetic media. Read and write operations may be independently synchronized with the movement of the media to ensure that the data can be read from and written to the desired location on the media. Data read from the media is typically processed in a read channel that processes an analog signal derived from a read transducer and outputs a digital signal.